Released 2018-03-09
0003369: [NBoot] On i.MX6UL/ULL, add support for speed limitation to 528 MHz
0003370: [NBoot] On i.MX6UL/ULL, DVS is on NAND_DQS which is configured as output high by Boot ROM
0003376: [NBoot] mask HAB HDR to support different ROM code versions
0003377: [NBoot] use different DDR settings for new efusA7UL board revision and UL/ULL
0003378: [NBoot] adjust DDR settings for GAR1
0003380: [NBoot] correct speed table for ULL
0003381: [NBoot] add processor specific fuse settings for HAB
0003384: [NBoot] use different IOMUX for ULL tamper pins
0003385: [NBoot] version should be VSxx for secure loader
0003333: [NBoot] Wrong pins for config jumpers used
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