View Issue Details
| ID | Project | Category | View Status | Date Submitted | Last Update |
|---|---|---|---|---|---|
| 0002072 | UBoot | Ethernet | public | 2014-01-16 14:01 | 2014-04-07 16:09 |
| Reporter | Keller | Assigned To | |||
| Priority | normal | Severity | minor | Reproducibility | always |
| Status | resolved | Resolution | fixed | ||
| Product Version | fsvybrid-V1.1 | ||||
| Target Version | fsvybrid-V2.0 | Fixed in Version | fsvybrid-V2.0 | ||
| Summary | 0002072: Improve Ethernet implementation | ||||
| Description | - Remove requirement for gd->bus_clk entry (see arch/arm/cpu/armv7/vybrid-common/speed.c - Store MAC address in ethernet controller to avoid the need for a command line argument - Let have each of the two ethernet ports have the same priotity. Currently we can not use ETH1 if ETH0 is not used. - Don't wait for Ethernet link by default; the timeout when cable is not connected slows down the boot process significantly - Don't activate second port on hardware that has only one port (check for PHY) | ||||
| Additional Information | The priority of the two ports is the result of the Freescale eval board implementation. There they use a PHY that has two ports but is only connected to the first ethernet port. So the second port can only work if the first port is activated. Our hardware has two separate PHYs and therefore we don't have this restriction. So we can remove this restriction from the software. | ||||
| Forum Link | |||||
