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IDProjectCategoryView StatusLast Update
0006978WINIOT93FSBUSpublic2025-11-06 14:27
Reporterroesner Assigned To 
PrioritynormalSeverityfeatureReproducibilityalways
Status newResolutionopen 
Product VersionV1.1 
Target VersionV1.2 
Summary0006978: FSBus: FPGA SPI Support on NetDCUMX93 Rev.120
DescriptionIn the latest Revision 1.20 of the NetDCU MX93 an FPGA has been integrated for the first time.
If you transmit data bytes to the FPGA, it will be converted into the FSBus protocol.

However, the FPGA requires a data word length of 11 bits and an SPI clock frequency between 4 and 6 MHz.
These parameters are currently not supported by the UEFI or the NXP SPI driver, and therefore need to be implemented or extended accordingly.

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