View Issue Details
| ID | Project | Category | View Status | Date Submitted | Last Update |
|---|---|---|---|---|---|
| 0004937 | UBoot | U-Boot | public | 2021-10-05 13:23 | 2021-10-05 15:07 |
| Reporter | derksen | Assigned To | |||
| Priority | normal | Severity | minor | Reproducibility | have not tried |
| Status | resolved | Resolution | fixed | ||
| Product Version | fsimx8mm-B2021.06 | ||||
| Target Version | fsimx8mn-Y2021.09 | Fixed in Version | fsimx8mn-Y2021.09 | ||
| Summary | 0004937: Add correct fuse values for fsimx8mn | ||||
| Description | Add correct fuse values for fsimx8mn The boot configuration fuses on i.MX8M-Nano are different to the fuses on i.MX8M-Mini. For example the offset for the Secondary Boot image is set in fuses, not by giving a Secondary Image Table in eMMC. eMMC: Register Bank/Word Mask Value Meaning 0x470 0x0001_0003 0x10000000 0x10000000 BT_FUSE_SEL 0x0000F000 0x00002000 USDHC3 eMMC 8-Bit 0x00000800 0x00000000 OVERRIDE_USDHC_BT_SEL 0x00000600 0x00000000 OVERRIDE_USDHC_BT_SEL_VAL Total 0x1000FE00 0x10002000 0x490 0x0002_0001 0xFF000000 0x00000000 USDHC_OVRD_PAD_SETTING_LOW8 0x00800000 0x00000000 RECOVERY_SDMMC_BOOT_DIS 0x00780000 0x00000000 IMG_CNTN_SET1_OFFSET: 1MB 0x00040000 0x00000000 USDHC_PAD_SION_EN 0x00010000 0x00000000 USDHC_DLL_EN 0x00008000 0x00000000 USDHC_DLL_SEL 0x00007F00 0x00000000 USDHC_DLL_DLY 0x00000080 0x00000000 USDHC_PWR_EN 0x00000040 0x00000000 EMMC_FAST_BT 0x00000030 0x00000000 SDMMC_BUS_WIDTH: 8 Bit 0x0000000C 0x00000000 SD_SPEED: eMMC Normal 0x00000002 0x00000000 USDHC_VOL_SEL: 3,3V I/O 0x00000001 0x00000000 USDHC_MFG_VOL_SEL: 3,3V I/O Total 0xFFFDFFFF 0x00000000 0x4A0 0x0002_0002 0x00000030 0x00000000 USDHC_PWR_INTERVAL 0x00000008 0x00000000 USDHC_PWR_DELAY 0x00000004 0x00000000 USDHC_PWR_POLARITY 0x00000002 0x00000000 USDHC_OVRD_PAD_SETTING_UP1 0x00000001 0x00000000 EMMC_FAST_BT_ACK Total 0x0000003F 0x00000000 NAND: Register Bank/Word Mask Value Meaning 0x470 0x0001_0003 0x10000000 0x10000000 BT_FUSE_SEL 0x0000F000 0x00004000 NAND 8-Bit 256 Pages 0x00000100 0x00000100 OVERRIDE_NAND_PG_PER_BLK 0x000000C0 0x00000040 64 Pages per Block Total 0x1000F1C0 0x10004140 0x4A0 0x0002_0002 0xFF000000 0x00000000 NAND_OVERRIDE_PAD_SETTING 0x00008000 0x00000000 BT_TOGGLE_MODE: Raw Nand 0x00006000 0x00000000 FCB_SEARCH_COUNT: 2 0x00001E00 0x00000000 NAND_TG_PREAMBLE_RD_LATENCY 0x00000100 0x00000000 NAND_RST_TIME Total 0xFF00FF00 0x00000000 0x4B0 0x0002_0003 0x0000F000 0x00000000 NAND_READ_RETRY_SEQ_ID: None 0x00000C00 0x00000000 NAND_ROW_ADDR_BYTES: 3 0x00000078 0x00000000 NAND_GPMI_DDR_DLL_VAL 0x00000003 0x00000000 NAND_CS_NUM: 1 Total 0x0000FC7F 0x00000000 | ||||
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